1. Field of the Invention
The present invention relates to a photoelectric current and voltage converting circuit which converts a photoelectric current generated from a light receiving element into a voltage and outputs the voltage as a binary signal.
2. Description of the Related Art
The photoelectric current and voltage converting circuit, which converts a photoelectric current generated from a light receiving element into voltage, such as a photodiode, and outputs the voltage as a binary signal, is applied in various technical fields.
For example, the photoelectric current and voltage converting circuit is used in a light reception circuit of a photo-coupler in order to isolate an input and output electrically as Factory Automation.
The photo-coupler supplies a light emitting element (e.g. a light-emitting diode) on input side with an electric signal to transmit a light signal from the light emitting element to a light receiving element on output side, and outputs an electric signal from the light receiving element.
This photoelectric current and voltage converting circuit is made into an IC and is used as a light receiving IC.
Hereinafter, a photoelectric current and voltage converting circuit 200 is explained as a conventional technique with reference to FIG. 1.
The photoelectric current and voltage converting circuit 200 includes a photodiode 1, an amplifier 12, a reference voltage circuit 16, a voltage divider circuit 20, and a comparator 30.
Here, an anode is grounded to the photodiode 1. The amplifier 12 includes an inverting amplifier 13. A non-inverting of the amplifier inputs a voltage source 15 (voltage is described as “Vo”) which reference voltage is on the ground voltage.
A cathode of the photodiode 1 is connected to an inverting input, and a feedback resistor 14 is connected between the inverting input terminal and the feedback resistor 14.
The reference voltage circuit 16 includes a non-inverting amplifier 17 as an operational amplifier. An offset resistor 18 is connected between an inverting input and an output. The inverting input is grounded through a constant current source 19, and the non-inverting input terminal is connected to the inverting input of the inverting amplifier 13.
As for voltage divider circuit 20, a resistor 21 and a resistor 22 are connected in series with the outputs of the amplifier 12 and the reference voltage circuit 16. The series connecting node is grounded through a condenser 23.
Further, as for the comparator 30, the non-inverting input of which is connected to the output of the amplifier 12. The inverting input of the comparator 30 is connected to the connecting nodes of the first resistor 21 and the second resistor 22.
An operation of the photoelectric current and voltage converting circuit 200 having such constitution will be described bellow.
A photoelectric current Ipd is not generated when a light is not inputted to the photodiode 1. Therefore, the photoelectric current Ipd does not flow through the feedback resistor 14 of the amplifier 12. As a result, the voltages of the output and the inverting input of the amplifier 12 are set in the same level each other, and set same as the voltage Vo of the non-inverting input of the amplifier 12 by a virtual short.
On the other hand, on the reference voltage circuit 16, an offset voltage Vos is generated by the offset resistor 18 and the constant current source 19.
A voltage higher than the voltage on the inverting input of the inverting amplifier 13 is outputted as a reference voltage Vref (=Vo+Vos). The higher voltage to be outputted is offset due to the difference of the offset voltage Vos.
The voltage between the outputs of the amplifier 12 and the reference voltage circuit 16 is divided by the first and second resistors 21 and 22 in the voltage divider circuit 20 to develop a threshold voltage Vth.
When the voltage Va (=Vo) on the output of the amplifier 12 is outputted, the voltage is compared to the threshold voltage Vth by the comparator 30.
Here, the output voltage Vo of the amplifier 12 is lower than the threshold voltage Vth. As a result, the binary signal is set Low and is outputted as an output signal Vout from the comparator 30 in the photoelectric current and voltage converting circuit 200 shown in FIG. 1.
On the contrary, the photoelectric current Ipd is generated when the light is inputted to the photodiode 1 due to the light intensity.
The photoelectric current Ipd flows trough the feedback resistor 14 in the direction of the inverting input from the output of the inverting amplifier 13.
As a result, the voltage of the photoelectric current Ipd is converted into a voltage Vr (=Ipd×Rf), where the Rf is a resistance value of the feedback resistor 14 between the two terminals of the feedback resistor 14, and then the voltage Va on the output develops Va (=Vo+Vr). When this voltage Va is outputted to the comparator 30 from the output of the amplifier 12, the voltage is compared with the threshold Vth from the voltage divider circuit 20.
When the intensity of the light-input to the photodiode 1 is lager than a certain level, the voltage Va is larger than the threshold Vth, then, judged as being inputted a signal. As a result, on the contrary of the above-mentioned case that the light is not inputted, the binary signal is set high and is outputted.
On the other hand, the intensity of the light-input to the photodiode 1 is less than the certain level, the voltage Va is less than the threshold Vth, and then, the binary signal is outputted as same as in the level when the light is not outputted. (Refer to Japanese Patent JP B 3121339)
An operation of the above-mentioned photoelectric current and voltage converting circuit 200 is described bellow with reference to a timing chart shown in FIG. 2.
First, as shown in FIG. 2A, the output voltage Va of amplifier 12 changes in Vo+Vr from the voltage Vo in response to the photoelectric current.
The reference voltage Vref (=Vo+Vos) is constant not having any influence of the photoelectric current Ipd.
The reference voltage Vref and the output voltage Va are divided by the first and the second divider resistors 21 and 22 of the voltage divider circuit 20, and are delayed by the condenser 23 so as to be the threshold voltage Vth as shown in FIG. 2A.
That is, when the output voltage Va of the amplifier 12 is rising; the threshold voltage Vth is lower than the reference voltage Vref in response to the dividing ratio of the voltage, and when the output voltage Va of the amplifier 12 is trailing, the threshold voltage Vth is higher than the reference voltage Vref in response to the dividing ratio of the voltage.
FIG. 2 is a timing chart showing the first and second divider resistances in the ratio two to one, as is exemplified in the Japanese Patent 3121339.
In this way, the output of the comparator 30 is switched immediately after the rising and trailing of the output Va of the amplifier 12, so that the level of the output signal Vout can be described such as the line graph shown in FIG. 2B.
Here, the impedance of the inverting input of the comparator 30 is considered bellow.
Inverting amplifier 13 and non-inverting amplifier 17 are conventional operational amplifier circuits. There input impedance are very large and can be treated as the impedance are infinite. There output impedance are very small and can be treated as zero. Therefore, the impedance of the inverting input of the comparator 30 is nearly same with the value that the first resistor 21 and the second resistor 22 and the condenser 23 are connected in parallel.
The resistor 21 and 22 usually have high resistances in the conventional circuit shown in FIG. 1, so that the impedance is high and is easily influenced by noise. Especially, when the output voltage Va of the amplifier 12 is rising, the threshold voltage Vth is lower than the reference voltage Vref in response to the ratio of the divided resistance so that the difference between the output voltage Va of the amplifier 12 and the threshold voltage Vth become small. It may cause errors of the comparator 30 or jitter of the output of the amplifier.